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DATA SHEET
BIPOLAR ANALOG INTEGRATED CIRCUIT
PC8002
SECOND MIXER + IF AMPLIFIER FOR DIGITAL CORDLESS TELEPHONES
The PC8002 is a monolithic IC developed for use in digital cordless telephones. Its internal equivalent circuits comprise a double balanced mixer (DBM), IF amplifier circuit, and RSSI (Received Signal Strength Indicator) circuit. The PC8002 can operate on a wide range of power supply voltages from 2.7 V to 5.5 V, and incorporates a poweroff function, making it ideal for achieving low set power consumption. The package is a 20-pin plastic shrink SOP (225 mil) suitable for high-density surface mounting.
FEATURES
* Low-voltage, low-consumption-current operation possible (VCC = 2.7 to 5.5 V, ICC = 3.4 mA at VCC = 3 V) * Wide mixer input frequency range (fMIX = 250 MHz (TYP.) to 500 MHz (MAX.)) * Wide IF amplifier input frequency range (fIF = 8 MHz (MIN.) to 12 MHz (MAX.), 10.7 MHz (TYP.)) * High limiting sensitivity (SL = -100 dBm (TYP.)) * Wide RSSI dynamic range (DR = 85 dB (TYP.)) * On-chip power-off function * Use of 20-pin plastic shrink SOP (225 mil) allows high-density surface mounting
BLOCK DIAGRAM
GND VCC BYPASS3 (IF OUT) (IF OUT) IF2 OUT
14 13 12 11
BYPASS1 IF1 IN
20 19
BYPASS2 IF1 OUT BYPASS4 IF2 IN
18 17 16 15
IF Amp 1
IF Amp 2 Output Stage
Power ON/OFF 2nd MIXER
RSSI
RSSI
1
2
3
4
5
6
7
8
9
10
PD
MIX OUT VCC (IF) VCC (MIX) LO IN
GND(IF) GND(MIX) MIX IN1 MIX IN2 RSSI OUT
ORDERING INFORMATION
Part Number Package 20-pin plastic shrink SOP (225 mil) 20-pin plastic shrink SOP (225 mil) Embossed carrier taping (pin 1 is tape unwinding direction) 20-pin plastic shrink SOP (225 mil) Embossed carrier taping (pin 1 is tape winding direction)
The information in this document is subject to change without notice. Document No. S10717EJ2V0DS00 (2nd edition) Date Published March 1997 N Printed in Japan
PC8002GR PC8002GR-E1 PC8002GR-E2
(c)
1997
PC8002
Application Circuit Example 1 (Using 2 BPFs)
VCC
1
PD
BYPASS1 20
1000 pF
2
MIX OUT
IF1 IN 19
VCC 1 F 1000 pF VCC 1 F
Lo OSC
3
VCC (IF)
BYPASS2 18
1000 pF
4
VCC (MIX)
IF1 OUT 17
BPF CFEC10.7MK1 (MURATA) DEM
1000 pF 470 pF 5 LO IN BYPASS4 16 0.01 F
6
GND (IF)
IF2 IN 15
7
GND (MIX)
BYPASS3 14
0.01 F
1st Mixer
470 pF
8
MIX IN1
GND (IF OUT) 13
470 pF
9
MIX IN2
VCC (IF OUT) 12 1 F
VCC
ADC
10 RSSI OUT
1000 pF IF2 OUT 11
Caution
Ensure that the pin voltage does not exceed the power supply voltage.
Remark The VCC pass capacitors (1 F, 1000 pF) should be located close to the respective VCC pins. Chip laminated ceramic capacitors (MURATA GRM36 or equivalent) should be used.
2
BPF CFEC10.7MK1 (MURATA)
PC8002
Application Circuit Example 2 (Using 1 BPF)
VCC
1
PD
BYPASS1 20
1000 pF
2
MIX OUT
IF1 IN 19
VCC 1 F 1000 pF VCC 1 F
Lo OSC
3
VCC (IF)
BYPASS2 18
1000 pF
4
VCC (MIX)
IF1 OUT 17
BPF CFEC10.7MK1 (MURATA) DEM
1000 pF 470 pF 5 LO IN BYPASS4 16 0.01 F
6
GND (IF)
IF2 IN 15
7
GND (MIX)
BYPASS3 14
0.01 F
1st Mixer
470 pF
8
MIX IN1
GND (IF OUT) 13
470 pF
9
MIX IN2
VCC (IF OUT) 12 1 F
VCC
ADC
10 RSSI OUT
1000 pF IF2 OUT 11
Cautions 1. 2.
Ensure that the pin voltage does not exceed the power supply voltage. With this application circuit, confirm that there is not problem with interfering wave characteristics.
Remark The VCC pass capacitors (1 F, 1000 pF) should be located close to the respective VCC pins. Chip laminated ceramic capacitors (MURATA GRM36 or equivalent) should be used.
330 pF
3
PC8002
Application Circuit Example 3 (Using 1 BPF)
VCC
1
PD
BYPASS1 20
1000 pF
2
MIX OUT
IF1 IN 19
VCC 1 F 1000 pF VCC 1 F
Lo OSC
3
VCC (IF)
BYPASS2 18
1000 pF
4
VCC (MIX)
IF1 OUT 17
390
1000 pF 470 pF 5 LO IN BYPASS4 16 0.01 F
6
GND (IF)
IF2 IN 15
1000 pF
7
GND (MIX)
BYPASS3 14
0.01 F
1st Mixer
470 pF
8
MIX IN1
GND (IF OUT) 13
470 pF
9
MIX IN2
VCC (IF OUT) 12 1 F
VCC
10 RSSI OUT
Cautions 1. 2.
With this application circuit, good interfering wave characteristics are obtained with a single BPF. However, there is a drop in sensitivity. Ensure that the pin voltage does not exceed the power supply voltage.
Remark The VCC pass capacitors (1 F, 1000 pF) should be located close to the respective VCC pins. Chip laminated ceramic capacitors (MURATA GRM36 or equivalent) should be used.
4
DEM
ADC
1000 pF IF2 OUT 11
BPF CFEC10.7MK1 (MURATA)
PC8002
Application Circuit Example 4 (Using 1 BPF)
VCC
1
PD
BYPASS1 20
1000 pF
2
MIX OUT
IF1 IN 19
VCC 1F 1000 pF VCC 1F
3
VCC (IF)
BYPASS2 18
1000 pF
4
VCC (MIX)
IF1 OUT 17
Lo OSC
1000 pF 470 pF 5 LO IN BYPASS4 16 0.01 F
6
GND (IF)
IF2 IN 15
1000 pF 1.5 H
7
GND (MIX)
BYPASS3 14
0.01 F
150 pF
1st Mixer
470 pF
8
MIX IN1
GND (IF OUT) 13
470 pF
9
MIX IN2
VCC (IF OUT) 12 1 F
VCC
10 RSSI OUT
Cautions 1. With this application circuit, good interfering wave characteristics are obtained with a single BPF (and sensitivity is better than in Application Circuit Example 3). 2. Ensure that the pin voltage does not exceed the power supply voltage. Remark The VCC pass capacitors (1 F, 1000 pF) should be located close to the respective VCC pins. Chip laminated ceramic capacitors (MURATA GRM36 or equivalent) and a chip coil (MURATA LQHIN or equivalent) should be used.
DEM
ADC
1000 pF IF2 OUT 11
1000 pF
390
BPF CFEC10.7MK1 (MURATA)
5
PC8002
CONTENTS
1. PIN CONFIGURATION AND PIN FUNCTIONS .................................................................................... 7 2. INPUT/OUTPUT EQUIVALENT CIRCUIT DIAGRAMS ........................................................................ 9 3. ELECTRICAL SPECIFICATIONS .......................................................................................................10 4. CHARACTERISTIC DIAGRAMS ........................................................................................................ 13 5. LEVEL DIAGRAMS .............................................................................................................................17 6. TEST METHODS ................................................................................................................................ 18 7. TEST CIRCUIT EXAMPLES ............................................................................................................... 19 8. EVALUATION BOARD MOUNTING EXAMPLE ................................................................................. 25 9. WIRING PATTERN CAPACITANCE DIAGRAM (REFERENCE) ........................................................ 28 10. PACKAGE DRAWINGS .......................................................................................................................29 11. RECOMMENDED SOLDERING CONDITIONS .................................................................................. 30
6
PC8002
1. PIN CONFIGURATION AND PIN FUNCTIONS
(1) Pin Configuration (Top View) * 20-pin plastic shrink SOP (225 mil)
PD MIX OUT VCC (IF) VCC (MIX) LO IN GND (IF) GND (MIX) MIX IN1 MIX IN2 RSSI OUT
1 2 3 4 5 6 7 8 9 10
20 19 18 17 16 15 14 13 12 11
BYPASS1 IF1 IN BYPASS2 IF1 OUT BYPASS4 IF2 IN BYPASS3 GND (IF OUT) VCC (IF OUT) IF2 OUT
Pin Names BYPASS1-BYPASS4 : Bypass GND (IF) GND (IF OUT) GND (MIX) IF1 IN, IF2 IN IF1 OUT, IF2 OUT LO IN MIX IN1, MIX IN2 MIX OUT PD RSSI OUT VCC (IF) VCC (IF OUT) VCC (MIX) : Ground (Intermediate Frequency Amp.) : Ground (Intermediate Frequency Amp. Output) : Ground (Mixer) : Intermediate Frequency Amp. Input : Intermediate Frequency Amp. Output : Local Input : Mixer Input : Mixer Output : Power Down : Received Signal Strength Indicator Output : Power Supply (Intermediate Frequency Amp.) : Power Supply (Intermediate Frequency Amp. Output) : Power Supply (Mixer)
7
PC8002
(2) Pin Functions
No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 PD MIX OUT VCC (IF) VCC (MIX) LO IN GND (IF) GND (MIX) MIX IN1 MIX IN2 RSSI OUT IF2 OUT VCC (IF OUT) GND (IF OUT) BYPASS3 IF2 IN BYPASS4 IF1 OUT BYPASS2 IF1 IN BYPASS1 Pin Name I/O I O - - I - - I I O O - - - I - O - I - Power on/off control signal input Mixer output IF amplifier and RSSI power supply pin Mixer power supply pin Local input IF amplifier and RSSI ground pin Mixer ground pin Mixer input Filter capacitor connection RSSI output IF amplifier 2 output IF amplifier output stage power supply pin IF amplifier output stage ground pin Filter capacitor connection (IF2 side) IF amplifier 2 input Filter capacitor connection (IF2 side) IF amplifier 1 output Filter capacitor connection (IF1 side) IF amplifier 1 input Filter capacitor connection (IF1 side) Function
8
PC8002
2. INPUT/OUTPUT EQUIVALENT CIRCUIT DIAGRAMS
Mixer Input
1 k
Mixer Output
276 1 k 700 A 8 9 2
Local Input
1 k
IF Amplifier 1 Output
207 17 1 k 250 A 5
IF Amplifier 1 Input
IF Amplifier 2 Output
19 330 18 14.9 k 14.9 k 330
20 11 290 A
IF Amplifier 2 Input
RSSI Output
VCC 32 k
15 330 14 11.8 k 11.8 k 330
16 10
2 k
Power On/Off Input
50 k
1 150 k
9
PC8002
3. ELECTRICAL SPECIFICATIONS
Absolute Maximum Ratings (TA = 25 C)
Parameter Power supply voltage Total power dissipation Storage temperature Pin voltage Symbol VCC PT Tstg VPIN TA = 85 C Test Condition Rating 7 120 -40 to +125 VCC+0.2 Unit V mW C V
Caution
Product quality may suffer if the absolute rating is exceeded for any parameter, even momentarily. In other words, an absolute maximum rating is a value at which the possibility of physical damage to the product cannot be ruled out. Care must therefore be taken to ensure that the these ratings are not exceeded during use of the product.
Recommended Operating Ratings (TA = 25 C)
Parameter Power supply voltage Operating ambient temperature Mixer input level Symbol VCC TA VMIX
0 dBm = 223.6 mVrms (at 50 )
Test Condition MIN. 2.7 -30 TYP. 3.0 +25 MAX. 5.5 +85 -18 -27 +5 -10 -14 250 8 8 10.7 10.7 10Note 10Note 500 12 12 dBm MHz MHz MHz pF pF dBm Unit V C dBm
50 resistance termination LC matching (reference value)
-98 -107 -5 -20 -99
Local input level
VLOC
50 resistance termination LC matching (reference value)
IF amplifier input level Mixer input frequency Mixer output frequency IF amplifier input frequency RSSI output load capacitance IF2 output load capacitance
VIF fMIX fOM fIF COI COR
Note
Includes all capacitances (board, pattern, etc.) applied to the pin.
10
PC8002
Electrical Specifications (TA = 25 C, VCC = 3 V) (1) Mixer Section (fMIX = 250 MHz, fLOC = 239.3 MHz, VLOC = -5 dBm) 0 dBm = 223.6 mVrms (at 50 )
(Where not specified in the Test Condition, input has 50 termination)
Parameter Power supply current Conversion gain Symbol ICCM GC No signal 50 resistance termination LC matching (reference value) -1 dB compression output level Third order intercept point Noise factor VOM IP3 NF LC matching (reference value) Local separation Mixer input impedance Local input impedance Output resistance Power-on rise time Power-off fall time Power-off power supply current ISL ZINM ZINL ROM tONM tOFM ILM VPO = 3 VNote 3 230 Mixer non-input Note 2 40 Stipulated by output Note 1 -14 4 Test Condition MIN. TYP. 1.7 8 17.0 -10 -3 16 7 54 31-j156 31-j169 330 8 1 0 430 15 3 5 -7 dBm dBm dB dB dB MAX. 2.2 11.0 Unit mA dB
s s A
VPO = 0 VNote 4 VPO = 0 V
Notes 1. f1 = 250.3 MHz, f2 = 250.6 MHz 2. Leakage from local input to mixer output 3. Time until the difference between the local input pin power-on and power-off voltages reaches 90 % Power-on input voltage (VPO) rise time: 10 ns 4. Time until the power supply current reaches 10 % of the power-on value Power-on input voltage (VPO) fall time: 10 ns
11
PC8002
(2) IF Amplifier Section (fIF = 10.7 MHz)
Parameter Power supply current Limiting sensitivity IF amplifier phase fluctuation IF amplifier output amplitude IF amplifier output amplitude rise time IF amplifier output amplitude fall time IF amplifier input resistance IF amplifier input capacitance IF amplifier output resistance RSSI linearity RSSI slope RSSI intercept RSSI output voltage 1 RSSI output voltage 2 RSSI output voltage 3 RSSI output voltage 4 RSSI output temperature stability RSSI output dynamic range RSSI rise time RSSI fall time RSSI output ripple RSSI output resistance Power-on rise time Power-off fall time Power-off power supply current Symbol ICCI SL SP VO tR tF Rin Cin RO LR SR IR VR1 VR2 VR3 VR4 ST DR trf1 trf2 RR ROR tONI tOFI ILI VPO = 3 V, no VPO = 0 signalNote 5 VIF = -14 dBm VIF = -54 dBm VIF = -94 dBm No signal VIF = -94 to -14 dBm Note 3 VIF = -14 dBm VIF = -14 dBm VIF = -14 dBm 25.6 32 5 1 6 Note 4 Note 4 Note 2 80 No signal -3 dB point VIF = -70 to -14 dBm IF2 OUT, VIF = -14 dBm IF2 OUT, VIF = -14 dBm IF2 OUT, VIF = -14 dBm IF1 IN, IF2 IN IF1 IN, IF2 IN IF1 OUT VIF = -94 to -14 dBm 18 -164.7 2.58 1.76 0.88 20 -148 2.68 1.88 1.08 0.96 2 90 1.0 1.6 4 4 20 38.4 10 3 10 230 230 Note 1 0.2
0 dBm = 223.6 mVrms (at 50 )
Test Condition MIN. TYP. 1.7 -100 10 0.3 8 15 330 3.5 330 0.4 20 25 430 6.0 430 2 22 -134.4 2.78 2.0 1.28 1.23 MAX. 2.3 -97 Unit mA dBm deg Vp-p ns ns pF dB mV/dB dBm V V V V dB dB
s s
mVp-p k
s s A
VNote 6
VPO = 0 V
Notes 1. Network analyzer RBW = 3 Hz 2. TA = -30 C to +85 C 3. Input level range for which drift from the regression expression with VIF = -94 to -14 dBm is 2 dB 4. Time until the RSSI output reaches the final value 10 % 5. Time until the RSSI output is within 10 % of the power-on value Power-on input voltage (VPO) rise time: 10 ns 6. Time until the power supply current reaches 10 % of the power-on value Power-on input voltage (VPO) fall time: 10 ns (3) Power-On/Off Section
Parameter Power-on input voltage Power-off input voltage Power-on input current Symbol VON VOF ION Test Condition Power-on at VON or above, VCC or below Power-off at VOF or below, GND or above VPO = 3 V 0.6 MIN. TYP. 1.5 1.2 40 60 MAX. 2.4 Unit V V
A
12
PC8002
4. CHARACTERISTIC DIAGRAMS
(1) Power supply current vs power supply voltage (IF amplifier section)
4
Power supply current [mA]
3
2
1
0 0 1 2 3 4 5 6 7 [V] Power supply voltage
(2) Power supply current vs power supply voltage (Mixer section)
5
4
Power supply current [mA]
3
2
1
0 0 1 2 3 4 5 6 7 [V] Power supply voltage
13
PC8002
(3) IF amplifier output level vs IF amplifier input level
0 _ 3dB _ 10
IF amplifier output level [dBm]
_ 20
Limiting sensitivity _ 30 _ 120 _ 100 _ 80 _ 60 _ 40 _ 20 0
[dBm] IF amplifier input level
(4) IF amplifier output phase vs IF amplifier input level
140
Input/output phase difference [deg]
130
120 Phase fluctuation 110 Test input level range 100 _ 70 _ 60 _ 50 _ 40 _ 30 _ 20 _ 14 _ 10
[dBm] IF amplifier input level
14
PC8002
(5) RSSI characteristics (a)
Regression line 3 2.5
RSSI output voltage [V]
2 1.5 1 0.5 0 _ 120
_ 100
_ 80
_ 60 [dBm] IF amplifier input level
_ 40
_ 20
0
Regression line
(6) RSSI characteristics (b)
5 4 3 2
RSSI error [dB]
1 0 _1 _2 _3 _4 _5 _ 120
_ 100
_ 80
_ 60 [dBm] IF amplifier input level
_ 40
_ 20
0
15
PC8002
(7) Mixer output level vs mixer input level
0 _ 10 _ 20
Mixer output level [dBm]
50 resistance termination
_ 30 _ 40 _ 50 _ 60 _ 70 _ 80 _ 70 _ 60 _ 50 _ 40 _ 30 _ 20 _ 10 0
[dBm] Mixer input level
16
PC8002
5. LEVEL DIAGRAMS
(1) For Application Circuit 1
PC8002GR
IF OUT 0.3 Vp-p
MIXER
BPF
IF Amp1
BPF
IF Amp2
+ 8 dBNote 1 + 17 dBNote 2 _ 10 dBm _ 18 _ 27 dBmNote 2 dBmNote 1
_ 4 dB
+ 42 dB
_ 4 dB
+ 66 dB
_ 14 dBm
_ 12 dBm _ 16 dBm
_ 6.5 dBm
_ 52 dBm 80 dB 80 dB _ 56 dBm
_ 98 dBmNote 1 _ 107 dBmNote 2
_ 90 dBm _ 94 dBm
(2) For Application Circuit 2
PC8002GR
IF OUT 0.3 Vp-p
MIXER 330 pF + 8 dBNote 1 + 17 dBNote 2 _ 10 dBm _ 18 dBmNote 1 _ 27 dBmNote 2
IF Amp1
BPF
IF Amp2
+ 42 dB
_ 4 dB
+ 66 dB
_ 12 dBm _ 16 dBm
_ 6.5 dBm
_ 48 dBm 80 dB 80 dB _ 52 dBm
_ 98 dBmNote 1 _ 107 dBmNote 2
_ 90 dBm
Notes 1. 50 resistance termination 2. LC matching (reference value)
17
PC8002
6. TEST METHODS
(1) Mixer input section (a) With 50 resistance termination (b) With 50 LC matching
470 pF 8 MIX IN1 VMIX 50 VMIX CNote LNote
470 pF 8 MIX IN1
Note
Since the values of L and C are affected by the board's parasitic capacitance and inductance, L and C should be adjusted so that the impedance looking at the MIX IN pin side from the signal source is 50 .
(2) Third order intercept
MIX IN1 8
MIX OUT 2
LO IN 5
470 p 50 82 pF
470 p
50 16.7 VMIX
fOSC = 239.3 MHz 16.7 16.7
f1 = 250.3 MHz
f2 = 250.6 MHz
18
PC8002
7. TEST CIRCUIT EXAMPLES
In test circuit example 2 onward, only the portion that differs from test circuit example 1 is shown. Test Circuit Example 1.
VCC
1
PD
BYPASS1
20
1000 pF
2
MIX OUT
IF1 IN
19 330 pF 50
82 pF VCC 1 F 1000 pF VCC 1 F 1000 pF 5 470 pF 50 6 GND (IF) IF2 IN 15 LO IN BYPASS4 16 4 VCC (MIX) IF1 OUT 17 3 VCC (IF) BYPASS2 18
1000 pF
0.01 F
7
GND (MIX)
BYPASS3
14
0.01 F
8 470 pF 50 9
MIX IN1
GND (IF OUT)
13
470 pF
MIX IN2
VCC (IF OUT)
12 1 F
VCC
1000 pF 10 RSSI OUT IF2 OUT 11 1000 pF 10 pF 10 pF 10 k
Caution
The 10 pF capacitor value for IF2 OUT and RSSI OUT includes all the capacitances (board, pattern, etc.) applied to the pin. Ensure that the recommended load condition (10 pF) is not exceeded for IF2 OUT and RSSI OUT.
Remark Chip laminated ceramic capacitors (MURATA GRM36 or equivalent) should be used.
BPF CFEC10.7MK1 (MURATA)
19
PC8002
Test Circuit Example 2. (Power supply current, power-off power supply current)
VCC (IF) 3
VCC (IF OUT) 12
VCC (MIX) 4
A 1000 pF VCC 1 F 1000 pF VCC
A 1 F 1000 pF
Test Circuit Example 3. (Limiting sensitivity, IF amplifier output amplitude, IF amplifier output amplitude rise time, IF amplifier output amplitude fall time, RSSI linearity, RSSI slope, RSSI intercept, RSSI output voltage, RSSI temperature stability, RSSI output ripple)
IF1 IN 19 330 pF
RSSI OUT 10
IF2 OUT 11 1000 pF
50
10 pF Digital voltmeter
10 k 10 pF Spectrum analyzer Oscilloscope
Oscilloscope SG (Signal generator) 10.7 MHz
Caution
The 10 pF capacitor value for IF2 OUT and RSSI OUT includes all the capacitances (board, pattern, etc.) applied to the pin. Ensure that the recommended load condition (10 pF) is not exceeded for IF2 OUT and RSSI OUT.
20
PC8002
Test Circuit Example 4. (IF amplifier phase fluctuation)
IF1 IN 19 330 pF
IF2 OUT 11 1000 pF
50
Attenuator 10 pF Network analyzer 10 k
Caution
The 10 pF capacitor value for IF2 OUT includes all the capacitance (board, pattern, etc.) applied to the pin. Ensure that the recommended load condition (10 pF) is not exceeded.
Test Circuit Example 5. (RSSI rise time, RSSI fall time) ... Time until RSSI output is within 10 % of the final value)
IF1 IN 19 330 pF
IF1 OUT 17 330 pF
IF2 IN 15
RSSI OUT 10
10 pF 50 50 For IF2 input
For IF1 input
SG 10.7 MHz, _14 dBm
SG 10.7 MHz, _14 dBm Storage oscilloscope 1
Storage oscilloscope 2
Input signal from SG
1 SEC
50 SEC
Caution
The 10 pF capacitor value for RSSI OUT includes all the capacitances (board, pattern, etc) applied to the pin.
21
PC8002
Test Circuit Example 6. (Power-on rise time) Mixer section : Time until the difference between the local input pin power-on and power-off voltage reaches 90 % IF section : Time until RSSI output is within 10 % of the power-on value.
PD 1
LO IN 5
RSSI OUT 10
10 pF
SG
Storage oscilloscope 1 Storage oscilloscope 2
Input signal from SG 3V 0V 1 SEC 50 SEC
Remark Power-on input voltage (VPO) rise time: 10 ns Caution The 10 pF capacitor value for RSSI OUT includes all the capacitances (board, pattern, etc.) applied to the pin. Ensure that the recommended load condition (10 pF) is not exceeded. Test Circuit Example 7. (Power-off fall time)
PD 1
VCC (IF OUT) 12
VCC (IF) 3
VCC (MIX) 4
VCC SG VCC
Storage oscilloscope
Current probe
Input signal from SG 3V 0V 1 SEC 50 SEC
22
PC8002
Test Circuit Example 8. (Conversion gain, -1 dB compression level)
MIX OUT 2 470 pF 82 pF 50
LO IN 5
MIX IN1 8 470 pF
See 6. TEST METHODS (1)
Spectrum analyzer SG 239.3 MHz SG 250 MHz
Test Circuit Example 9. (Third order intercept output level)
MIX OUT 2 470 pF 82 pF 50
LO IN 5
MIX IN1 8 470 pF
See 6. TEST METHODS (2)
Spectrum analyzer SG 239.3 MHz
Test Circuit Example 10. (Local separation)
MIX OUT 2 470 pF 82 pF 50
LO IN 5
Spectrum analyzer SG 239.3 MHz
23
PC8002
Test Circuit Example 11. (Power-on input voltage, power-off input voltage, power-on input current)
PD 1 A
V VCC
Test Circuit Example 12. (Noise factor)
MIX OUT 2 470 pF 82 pF 50
LO IN 5
MIX IN1 8 470 pF
See 6. TEST METHODS (1)
NF meter
Noise Source
24
PC8002
8. EVALUATION BOARD MOUNTING EXAMPLE
IF2 OUT
C5
C6
70 mm
C1
1
PC8002
Plated wire
C7 R1
VCC
Remark
indicates a through-hole.
50 mm
KC-8002GR
C2 C3 C4
25
26
Remark indicates a through-hole.
IF1 IN
R2
C9
MIX OUT
C 8
BPF
VCC
C11
C 10
1 BPF
C 9 C 10
R3
C11 C10
LOCAL IN
C12 C 13 R4
L2
RSSI OUT IF2 OUT
L1
MIX IN
PC8002
PC8002
C1 C2 C3 C4 C5 C6 C7 C8 C9 : 1 F : 1000 pF : 1000 pF : 1 F : 1 F : 1000 pF : 10 pF Note : 330 pF : 0.01 F R1 R2 R3 R4 L1 L2 : 10 k : 50 : 50 : 50 : 58 nH (reference value) : 10 nH (reference value)
C10 : 0.01 F C11 : 470 pF C12 : 470 pF C13 : 10 pF Note Note For the IF2 OUT and RSSI OUT capacitance values, see 9. WIRING PATTERN CAPACITANCE DIAGRAM (REFERENCE). Remarks 1. Both L in the case of LC matching and R in the case of 50 termination are connected to MIX IN. Remove R4 in the case of LC matching, and L1 and L2 in the case of 50 termination. 2. Change the location of the plated wires according to the evaluation items. 3. Cut the wiring pattern to connect L2 .
27
PC8002
9. WIRING PATTERN CAPACITANCE DIAGRAM (REFERENCE)
The wiring pattern capacitances to ground are shown here. For pin 11, the capacitance is 8.1 pF when the entire pattern (from pin 11 to point B) is used. In this case, the usable probe input capacitance is 1.9 pF (MAX.). From pin 11 up to point A, the capacitance is 1.4 pF, and therefore an 8.6 pF (MAX.) probe can be used. For pin 10, the capacitance is 4 pF when the entire pattern is used.
Pin 11
A IF2 OUT
3.0 pF
0.9 pF
0.5 pF
2.9 pF 0.8 pF Pin 10 B
RSSI OUT
28
PC8002
10. PACKAGE DRAWINGS
20 PIN PLASTIC SHRINK SOP (225mil)
20 11
detail of lead end
1 A
10
H I J
F
G
E
N C D M
M
B
K
L
NOTE Each lead centerline is located within 0.10 mm (0.004 inch) of its true position (T.P.) at maximum material condition.
ITEM A B C D E F G H I J K L M N P
MILLIMETERS 7.00 MAX. 0.575 MAX. 0.65 (T.P.) 0.22 +0.10 -0.05 0.10.1 1.45 MAX. 1.150.1 6.40.2 4.40.1 1.00.2 0.15 +0.10 -0.05 0.50.2 0.10 0.10 3 +7 -3
P
INCHES 0.276 MAX. 0.023 MAX. 0.026 (T.P.) 0.009 +0.004 -0.003 0.0040.004 0.057 MAX. 0.045 +0.005 -0.004 0.2520.008 0.173 +0.005 -0.004 0.039 +0.009 -0.008 0.006 +0.004 -0.002 0.020 +0.008 -0.009 0.004 0.004 3 +7 -3 P20GR-65-225C-1
29
PC8002
11. RECOMMENDED SOLDERING CONDITIONS
The following conditions ( see table below) must be met when soldering this product. For more details, refer to our document "SEMICONDUCTOR DEVICE MOUNTING TECHNOLOGY MANUAL" (C10535E). Please consult with our sales offices in case other soldering process or condition is used.
TYPE OF SURFACE MOUNT DEVICE
PC8002GR
Soldering process Infrared Ray Reflow Soldering conditions Peak package's surface temperature: 235 C or below. Reflow time : 30 seconds or below (210 C or higher), Number of reflow processes : MAX.2 Exposure limit
Note
Symbol IR35-107-2
: 7 days
(10 hours pre-baking is required at 125 C afterwards) VPS Peak package's temperature: 215 C or below. Reflow time : 40 seconds or below (200 C or higher), Number of reflow processes : MAX. 2 Exposure limit
Note
VP15-107-2
: 7 days
(10 hours pre-baking is required at 125 C afterwards) Partial heating method Terminal temperature : 300 C or below, Time : 3 seconds or below (Per side of pin position)
Note Exposure limit before soldering after dry-pack package is opened. Storage conditions : 25 C and relative humidity at 65 % or less. Caution Do not apply more than one soldering method at any one time, except for " Partial heating method".
30
PC8002
[MEMO]
31
PC8002
The application circuits and their parameters are for references only and are not intended for use in actual design-in's.
No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in this document. NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from use of a device described herein or any other liability arising from use of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC Corporation or others. While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices, the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or property arising from a defect in an NEC semiconductor device, customers must incorporate sufficient safety measures in its design, such as redundancy, fire-containment, and anti-failure features. NEC devices are classified into the following three quality grades: "Standard", "Special", and "Specific". The Specific quality grade applies only to devices developed based on a customer designated "quality assurance program" for a specific application. The recommended applications of a device depend on its quality grade, as indicated below. Customers must check the quality grade of each device before using it in a particular application. Standard: Computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support) Specific: Aircrafts, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems or medical equipment for life support, etc. The quality grade of NEC devices is "Standard" unless otherwise specified in NEC's Data Sheets or Data Books. If customers intend to use NEC devices for applications other than those specified for Standard quality grade, they should contact an NEC sales representative in advance. Anti-radioactive design is not implemented in this product.
M4 96.5
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